High performance electronic circuits, such as integrated circuits (ICs) and microprocessors, are designed to operate within specified voltage supply boundaries. If the circuit is operated outside the specified voltage supply boundaries the circuit may not function properly (e.g., introducing noise, improper signal timing, etc.) or the circuit may even be damaged.
When designing electronic circuits, the designers typically assume voltage supply boundaries for proper operation of the circuit and use generic circuit design tools to test whether these assumptions are correct. However, generic circuit design tools are typically focused on other aspects of circuit design and may not provide an accurate understanding of circuit operation for testing voltage supply assumptions. In addition, these tools may be useless if the wrong assumptions are being tested.
Noise analysis models are also available which utilize statistical characterization of combinational logic to model and test voltage supplies for electronic circuits. However, these models assume a general power and capacitance density spread uniformly over the circuit without regard for which parts of the circuit are drawing the most current. In addition, these models do not account for changes in power dissipation within a clock cycle.
As a result, the electronic circuits may experience unacceptable voltage supply noise. Considerable time and effort may then be spent debugging the circuits, delaying introduction of the electronic circuit in the marketplace and increasing the cost of the circuit when it is introduced.